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 MC74VHC1G09 2-Input AND Gate with Open Drain Output
The MC74VHC1G09 is an advanced high speed CMOS 2-input AND gate with open drain output fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including an open drain output which provides the capability to set output switching level. This allows the MC74VHC1G09 to be used to interface 5 V circuits to circuits of any voltage between VCC and 7 V using an external resistor and power supply. The MC74VHC1G09 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage.
Features http://onsemi.com MARKING DIAGRAMS
5 SC-88A / SOT-353 / SC-70 DF SUFFIX CASE 419A VX M G G M 1
* * * * * *
High Speed: tPD = 4.3 ns (Typ) at VCC = 5 V Low Internal Power Dissipation: ICC = 1 mA (Max) at TA = 25C Power Down Protection Provided on Inputs Pin and Function Compatible with Other Standard Logic Families Chip Complexity: FETs = 62; Equivalent Gates = 16 Pb-Free Packages are Available
TSOP-5 / SOT-23 / SC-59 DT SUFFIX CASE 483 VX M G = Device Code = Date Code* = Pb-Free Package VX M G G
IN B
1 OVT
5
VCC
(Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location.
IN A
2 1 2
PIN ASSIGNMENT
IN B IN A GND OUT Y VCC
GND
3
4
OUT Y
3 4 5
Figure 1. Pinout (Top View) FUNCTION TABLE
Inputs A IN A IN B & OUT Y L L H H B L H L H Output Y L L L Z
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2007
1
January, 2007 - Rev. 16
Publication Order Number: MC74VHC1G09/D
MC74VHC1G09
MAXIMUM RATINGS
Symbol VCC VIN VOUT IIK IOK IOUT ICC PD qJA TL TJ Tstg MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage Input Diode Current Output Diode Current DC Output Current, per Pin DC Supply Current, VCC and GND Power dissipation in still air Thermal resistance Lead temperature, 1 mm from case for 10 s Junction temperature under bias Storage temperature Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 28 to 34 Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) Above VCC and Below GND at 125C (Note 4) SC-88A, TSOP-5 SC-88A, TSOP-5 Characteristics Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to 7.0 -20 +20 +25 +50 200 333 260 +150 -65 to +150 Level 1 UL 94 V-0 @ 0.125 in > 2000 > 200 N/A 500 V Unit V V V mA mA mA mA mW C/W C C C
ILatchup
Latchup Performance
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA/JESD22-A114-A 2. Tested to EIA/JESD22-A115-A 3. Tested to JESD22-C101-A 4. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN VOUT TA tr, tf DC Supply Voltage DC Input Voltage DC Output Voltage Operating Temperature Range Input Rise and Fall Time VCC = 3.3 V 0.3 V VCC = 5.0 V 0.5 V Characteristics Min 2.0 0.0 0.0 -55 0 0 Max 5.5 5.5 7.0 +125 100 20 Unit V V V C ns/V
Device Junction Temperature versus Time to 0.1% Bond Failures
NORMALIZED FAILURE RATE Junction Temperature C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0 FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130 C TJ = 120 C TJ = 110 C TJ = 100 C TJ = 80 C 100 TIME, YEARS TJ = 90 C
1 1 10 1000
Figure 3. Failure Rate vs. Time Junction Temperature http://onsemi.com
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MC74VHC1G09
DC ELECTRICAL CHARACTERISTICS
VCC (V) 2.0 3.0 4.5 5.5 2.0 3.0 4.5 5.5 VIN = VIH or VIL IOL = 50 mA VIN = VIH or VIL IOL = 4 mA IOL = 8 mA IIN ICC IOFF Maximum Input Leakage Current Maximum Quiescent Supply Current Power Off-Output Leakage Current VIN = 5.5 V or GND VIN = VCC or GND VOUT = 5.5 V VIN = 5.5 V 2.0 3.0 4.5 3.0 4.5 0 to 5.5 5.5 0 0.0 0.0 0.0 TA = 25C Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 0.1 0.1 0.1 0.36 0.36 0.1 1.0 0.25 Typ Max TA 85C Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 0.1 0.1 0.1 0.44 0.44 1.0 20 2.5 Max -55 TA 125C Min 1.5 2.1 3.15 3.85 0.5 0.9 1.35 1.65 0.1 0.1 0.1 0.52 0.52 1.0 40 5 mA mA mA Max Unit V
Symbol VIH
Parameter Minimum High-Level Input Voltage
Test Conditions
VIL
Maximum Low-Level Input Voltage
V
VOL
Maximum Low-Level Output Voltage VIN = VIH or VIL
V
V
I I IIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I III I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII IIIIIII I I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII IIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIII II III I IIIII I I I I I I IIII II IIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII IIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I I I I I I IIII IIIIIII I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIII III I IIIIIIII I I II I III IIIII IIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII I I I IIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII
TA = 25C Typ 6.2 8.7 4.3 5.8 8.7 5.8 6.0 TA 85C -55 TA 125C Min Max Symbol tPZL Parameter Test Conditions Min Max Min Max Unit ns Maximum Output Enable Time, Input A or B to Y VCC = 3.3 0.3 V CL = 15 pF RL = RI = 500 W CL = 50 pF VCC = 5.0 0.5 V CL = 15 pF RL = RI = 500 W CL = 50 pF VCC = 3.3 0.3 V CL = 50 pF RL = RI = 500 W VCC = 5.0 0.5 V CL = 50 pF RL = RI = 500 W 8.8 12.3 5.9 7.9 10.5 14.0 7.0 9.0 12.5 16.5 9.0 11.0 tPLZ Maximum Output Disable Time 12.3 7.9 10 14.0 9.0 10 16.5 11.0 10 ns CIN Maximum Input Capacitance pF Typical @ 25C, VCC = 5.0 V 18 CPD Power Dissipation Capacitance (Note 5) pF 5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr = tf = 3.0 ns
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MC74VHC1G09
VCC A B OVT VCC - 7 V RL A or B 50% GND tPZL Y 50% VCC tPLZ HIGH IMPEDANCE VOL +0.3 V VCC
Figure 4. Output Voltage Mismatch Application
Figure 5. Switching Waveforms
VCC VCC x 2
PULSE GENERATOR RT
R1 DUT CL RL
CL = 50 pF equivalent (Includes jig and probe capacitance) RL = R1 = 500 W or equivalent RT = ZOUT of pulse generator (typically 50 W)
Figure 6. Test Circuit
VCC MC74VHC1G09 A B MC74VHC1G03 C D 3 E = (A * B) + (C+D) 4 2.2 kW B A 1 2 5
VCC
VCC MC74VHC1G09 3.3 V 1.5 V 220 W GTL
RLED
A B
Figure 7. Complex Boolean Functions
Figure 8. LED Driver
Figure 9. GTL Driver
ORDERING INFORMATION
Device MC74VHC1G09DFT1 MC74VHC1G09DFT1G MC74VHC1G09DFT2 MC74VHC1G09DFT2G MC74VHC1G09DTT1 MC74VHC1G09DTT1G Package SC70-5 / SC-88A / SOT-353 SC70-5 / SC-88A / SOT-353 (Pb-Free) SC70-5 / SC-88A / SOT-353 SC70-5 / SC-88A / SOT-353 (Pb-Free) SOT23-5 / TSSOP-5 / SC59-5 SOT23-5 / TSSOP-5 / SC59-5 (Pb-Free) 3000/Tape & Reel Shipping
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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MC74VHC1G09
PACKAGE DIMENSIONS
SC-88A, SOT-353, SC-70 CASE 419A-02 ISSUE J
A G
5
4
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A-01 OBSOLETE. NEW STANDARD 419A-02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS.
S
1 2 3
-B-
DIM A B C D G H J K N S
D 5 PL
0.2 (0.008)
M
B
M
N J C
INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --- 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087
MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --- 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20
H
K
SOLDERING FOOTPRINT*
0.50 0.0197
0.65 0.025 0.65 0.025 0.40 0.0157
1.9 0.0748
SCALE 20:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC74VHC1G09
PACKAGE DIMENSIONS
TSOP-5 CASE 483-02 ISSUE F
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 5. OPTIONAL CONSTRUCTION: AN ADDITIONAL TRIMMED LEAD IS ALLOWED IN THIS LOCATION. TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2 FROM BODY. DIM A B C D G H J K L M S MILLIMETERS MIN MAX 3.00 BSC 1.50 BSC 0.90 1.10 0.25 0.50 0.95 BSC 0.01 0.10 0.10 0.26 0.20 0.60 1.25 1.55 0_ 10 _ 2.50 3.00
NOTE 5 2X
D 5X 0.20 C A B
5 1 2 4 3
0.10 T 0.20 T L G A B S
M K
DETAIL Z
2X
DETAIL Z
J C 0.05 H T
SEATING PLANE
SOLDERING FOOTPRINT*
1.9 0.074
0.95 0.037
2.4 0.094 1.0 0.039 0.7 0.028
SCALE 10:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
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6
MC74VHC1G09/D


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